SoC设计中主要的EDA工具
常用的EDA工具以高亮标示出。
参考：SoC设计方法与实现(第3版)，郭炜，魏继增，郭筝，谢憬 编著
仿真与验证
| 工具分类 |
工具及供应商 |
| Digital Simulator |
NC-Verilog/Verilog-XL(cadence)，VCS(synopsys) |
| Equivalence Check |
Encounter Conformal Equivalence Checker(cadence)，Formality(synopsys)，FormalityPro(Mentor) |
| Waveform Viewer |
Debussy，Verdi(Novas) |
| Analog Simulator |
Hspice，NanoSim(synopsys)，Incisive AMS(cadence)，Advance MS(Mentor) |
| RTL Code Coverage |
HDL Score(Innoveda)，VCS(synopsys)，VN-Cover(TransEDA) |
| RTL Syntax and SRS Checker |
nLint(Novas)，SpyGlass(Atrenta)，Leda(synopsys) |
| C++ Based System Testbench |
Nucleus(Mentor) |
综合
| 工具分类 |
工具及供应商 |
| Clock Gating |
Power Compiler(synopsys)，Power-savvy(Azuro) |
| RTL Synthesis |
Design Compiler(synopsys) |
| Physical Synthesis |
BlastFusion(magma)，Physical Compiler(synopsys) |
物理设计
| 工具分类 |
工具及供应商 |
| Floor Plan |
First Encounter(cadence)，Floorplan Compiler，JupiterXT(synopsys) |
| Cell Place and Route |
SOC Encounter(cadence)，ICC(synopsys) |
| Clock Tree Synthesis |
CTGen(cadence)，Astro(synopsys) |
| scan Chain Reorder |
Silicon Ensemble(cadence) |
| Signal Integrity |
Celtic NDC(cadence)，Blast Noise(magma)，PrimeTimeSI/Asto-Xtalk(synopsys) |
| IR Drop /Electronmigration |
Blast Rail(magma)，Astro Rail(synopsys) |
| RC Extraction |
Fire&Ice(3-D)(cadence)，HyperExtract(2.5-D)(cadence)，Star-RCXT(3-D)(synopsys) |
| LVS&DRC |
Calibre(mentor)，Hercules(synopsys) |
时序和功耗检查
| 工具分类 |
工具及供应商 |
| Static Timing Analysis |
Prime TimeSI(synopsys)，Peral(cadence) |
| Cell Level Power |
PrimePower(synopsys) |
| Transistor Level Timing |
PathMill(synopsys) |
| Transistor Level Power |
PowerMill(synopsys) |
| Dynamic Timing Analysis |
NC-Verilog/Verilog-XL(cadence)，VCS(synopsys) |
定制设计
| 工具分类 |
工具及供应商 |
| Schematic Capture |
Composer(cadence) |
| Spice Netlister |
Cadence/MICA direct(cadence) |
| Layout Editor |
Enterprise(synopsys)，Virtuoso(cadence) |
可测性设计
| 工具分类 |
工具及供应商 |
| ATPG |
Fastscan(mentor)，TetraMAX(synopsys) |
| Boundary scan |
BSDArchitect(mentor)，BSD Compiler(synopsys) |
| scan Insertion |
DFTAdvisor(mentor)，DFT Compiler(synopsys) |
| Memory BIST |
mBISTArchitect(mentor)，SoCBIST(synopsys) |
RTL-to-GDSⅡ
| 工具分类 |
工具及供应商 |
| RTL-to-GDSⅡ |
SoCEncounter(cadence)，Galaxy(synopsys)，Blaster(magma) |
ESL
| 工具分类 |
工具及供应商 |
| System Level Design & Simulation |
Seamless(mentor)，Catapult(mentor)，Co Ware ESL 2.0(Co Ware)，ESL CoCentric System Studio(synopsys) |
