c语言spi测试代码,spi_test.c的spi跟踪（spi 数据传送流程）

晚上跟踪 了下spi_test.c,数据的传送流程大概是这样的：

transfer()(spidev_test.c)–>

ioctl()(spidev_test.c)–>

spidev_ioctl()(spidev_test.c)—>

spidev_message()(spidev.c)—>

spidev_sync()(spidev.c)—>

spi_async(spi.h)–通过调用

spi->master->transfer(spi ,message)

调用—>spi_bitbang_transfer()(spi_bitbang.c)—>

bitbang_work()(spi_bitbang.c)–

通过status=bitbang->txrx_buf()

调用—->sep4020_spi_txrx()具体的传数据，其实是 sep4020_spi_txrx()(spi_sep4020.c)与sep4020_spi_txrx()(spi_sep4020.c)共同实现的，通过硬件上的中断触发，完成了数据的传送

spidev_message()函数：

1：把用户空间的数据传进buf；

2：通过spidev_sync()函数一级级调用，来传输数据

3：把buf中的数据在送到用户空间中，通过终端显示

以下是代码运行a.out跟踪代码

# mount all………..

mount: mounting none on /proc/bus/usb failed: No such file or directory

# Starting mdev………

starting pid 358, tty '': '-/bin/sh'

hwclock: can't open '/dev/misc/rtc': No such file or directory

mkdir: cannot create directory '/var/run': File exists

/ # ./a.out

after the open———————————–

we have enter the  iocontl*****************

we have enter the  iocontl*****************

<7>spidev spi0.0: before the setup———1——-

<7>spidev spi0.0: —********we enter the sep4020_soi_setupxfer

<7>SPI: sep4020_spi_setupxfer: we get the clk rate  is 176

<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)

<7>SPI: sep4020_spi_setupxfer: the value of div is 176

<7>SPI: sep4020_spi_setupxfer: the value of BITBANG_CS_INACTIVE is 0

<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel

<7>spidev spi0.0: sep4020_spi_setup: mode 0, 8 bpw, 500000 hz

<7>spidev spi0.0: spi mode 00

we have enter the  iocontl*****************

we have enter the  iocontl*****************

after the spi mode———————————-

we have enter the  iocontl*****************

we have enter the  iocontl*****************

<7>spidev spi0.0: before the setup————-3—

3333333333333333333

3333333333333333333

<7>spidev spi0.0: —********we enter the sep4020_soi_setupxfer

<7>SPI: sep4020_spi_setupxfer: we get the clk rate  is 176

<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)

<7>SPI: sep4020_spi_setupxfer: the value of div is 176

<7>SPI: sep4020_spi_setupxfer: the value of BITBANG_CS_INACTIVE is 0

<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel

<7>spidev spi0.0: sep4020_spi_setup: mode 0, 8 bpw, 500000 hz

<7>spidev spi0.0: 8 bits per word

we have enter the  iocontl*****************

we have enter the  iocontl*****************

after the bits per wors—————————–

we have enter the  iocontl*****************

we have enter the  iocontl*****************

<7>spidev spi0.0: before the setup————-4—

<7>spidev spi0.0: —********we enter the sep4020_soi_setupxfer

<7>SPI: sep4020_spi_setupxfer: we get the clk rate  is 176

<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)

<7>SPI: sep4020_spi_setupxfer: the value of div is 176

<7>SPI: sep4020_spi_setupxfer: the value of BITBANG_CS_INACTIVE is 0

<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel

<7>spidev spi0.0: sep4020_spi_setup: mode 0, 8 bpw, 500000 hz

<7>spidev spi0.0: 500000 Hz (max)

we have enter the  iocontl*****************

we have enter the  iocontl*****************

after the max speed hz———————————-

spi mode: 0

bits per word: 8

max speed: 500000 Hz (500 KHz)

before the transfer iocontl

we have enter the  iocontl*****************

we have enter the  iocontl*****************

<7>spidev spi0.0: default————-

——–1——–

——–1——–

———2——-

———2——-

——–3——–

——–3——–

——–4——–

——–4——–

——–5——–

——–5——–

——–6——–

——–6——–

we are in spidev_sync —–

we are in spidev_sync —–

********************spi_bitbang_transfer***********************************

********************spi_bitbang_transfer***********************************

********************spi_bitbang_transfer****************end*******************

********************spi_bitbang_transfer****************end*******************

after the spi_async

after the spi_async

1

1

2

2

*******************bitbang_work***********************************

*******************bitbang_work***********************************

bitbang_work*******1***********

bitbang_work*******1***********

we enter the sep4020_soi_setupxfer

we enter the sep4020_soi_setupxfer

<7>SPI: sep4020_spi_setupxfer: we get the clk rate  is 176

<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)

<7>SPI: sep4020_spi_setupxfer: the value of div is 176

bitbang_work*******2***********

bitbang_work*******2***********

<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel

<7>SPI: sep4020_spi_chipsel: we have enble spi in the sep4020_spi_chipsel

bitbang_work*******3***********

bitbang_work*******3***********

bitbang_work*******4***********

bitbang_work*******4***********

<7>spidev spi0.0: txrx: tx c1c0c000, rx c1c0c000, len 38

<7>SPI: sep4020_spi_txrx: the value of SSIENR is :0x1

<7>SPI: sep4020_spi_txrx: in sep4020_spi_irq before enable spi in txrx

<7>SPI: sep4020_spi_txrx: have enble spi in txrx

<7>SPI: sep4020_spi_txrx: we begin to sent the first byte:0xff

<7>SPI: sep4020_spi_txrx: SSI_IMR:0x1e ,SSI_ISR:0x0 ,SSI_RISR:0x1 ,SSI_SR:0x2

<7>SPI: sep4020_spi_irq: I am done

<7>SPI: sep4020_spi_txrx: the read data is :0

we enter the sep4020_soi_setupxfer

we enter the sep4020_soi_setupxfer

<7>SPI: sep4020_spi_setupxfer: we get the clk rate  is 176

<7>spidev spi0.0: setting pre-scaler to 176 (hz 500000)

<7>SPI: sep4020_spi_setupxfer: the value of div is 176

<7>SPI: sep4020_spi_chipsel: we have enter the sep4020_spi_chipsel

*******************bitbang_work********************end***************

*******************bitbang_work********************end***************

3

3

4

4

5

5

the end of the spidev_sync—-

the end of the spidev_sync—-

——-7——–

——-7——–

we have after the transfer iocotl———-

FF FF FF FF FF FF

40 00 00 00 00 95

FF FF FF FF FF FF

FF FF FF FF FF FF

FF FF FF FF FF FF

DE AD BE EF BA AD

BC AC

/ #

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